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Please use this identifier to cite or link to this item:
http://hdl.handle.net/123456789/3499
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| Title: | TRANSACTIONAL MEMORY |
| Authors: | Brilley Batley C |
| Keywords: | SOFTWARE TRANSACTIONAL MEMORY HARDWARE TRANSACTIONAL MEMORY |
| Issue Date: | 10-Jun-2011 |
| Abstract: | A primary challenge of parallel programming is to find better
abstractions for expressing parallel computation and for writing parallel
programs. Parallel programming encompasses all of the difficulties of
sequential programming, but also introduces the hard problem of
coordinating interactions among concurrently executing tasks. Today, most
parallel programs employ low-level programming constructs that are just a
thin veneer over the underlying hardware. These constructs consist of
threads, which are an abstract processor, and explicit synchronization (for
example, locks, semaphores, and monitors) to coordinate thread execution.
Parallel programs written with these constructs are difficult to design,
program, debug and maintain.
Transactional Memory was created to simplify parallel programming
and relieve software developers from the difficulties associated with lock-
based parallel programming. With TM, programmers simply mark code
segments as transactions that should execute atomically and in isolation with
respect to other code, and the TM system manages the concurrency control
for them. All TM systems use either hardware-based or software-based
approaches to implement the two basic TM mechanisms: data versioning
and conflict detection. |
| URI: | http://hdl.handle.net/123456789/3499 |
| Appears in Collections: | MTech 2009-2011 Batch
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