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|Title: ||Compiling for Reconfigurable Computing|
|Authors: ||Sameer Muhammed Thahir|
|Keywords: ||reconfigware, reconfigurable, fpga, compiler, parallel, supercomputer, concurrency|
|Issue Date: ||26-May-2011|
|Abstract: ||Reconfigurable Computing is a modern day architecture that would change the conventional outlook of processor and computing architectures. Reconfigware would bring about a revolution in the field of processing and computing by introducing reconfigurable hardware that can be configured/ customized on the fly.
Reconfigurable computing uses reconfigurable cores to perform specific operations by customizing the hardware according to our needs(through FPGAs). Such Hardware would bring about drastic changes in terms of performance and energy efficiency. The ability to customize the hardware to our needs brings flexibility that we have now only seen in software. The seminar will introduce the concept of ``Reconfigurable Computing'' by explaining its basic varieties, architecture and reconfigurable cores.
In order for reconfigurable computing to be adopted at a large scale, there must exist methods for programmers to develop applications/ code that would possess features of reconfigurable architectures and utilize the true capabilities of reconfigware. Compilers are the first step to achieving this goal.Compilers have a bigger responsibility of producing code that can map directly to the hardware in use. They must mimic operations of Hardware Description languages to enable them to produce reconfigurable code.
In order for programs to possess the above mentioned properties, the compilers must be able to provide specific techniques to produce reconfigurable code. The seminar will throw light on some important techniques at different levels of the compilation process that need to be possessed by reconfigware compilers enabling them to leverage the true power of the reconfigurable architectures.|
|Appears in Collections:||MTech 2010-2012 Batch|
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